Postgraduate Diploma in mmWave Front-Ends and RF Packaging
Online 800-hour Postgraduate Diploma in mmWave Front-Ends and RF Packaging. 8 modules covering 3GPP TS 38.101-2, 3GPP TS 38.104 and Keysight PathWave RFIC Design (GoldenGate). Assigned tutor and open enrolment.
Take the controls.
Run a real engineering trade-off from this field. Move the sliders, watch the model react in real time and beat the challenge.
What you will be able to do
Analyse the particularities of propagation and materials at mmWave.
Design front-end blocks at millimetre waves.
Apply RF integrated circuit design techniques in silicon.
Select packaging technologies for high frequency.
Design modules with an antenna integrated into the package.
Address board-level integration and thermal management of front-ends.
Experimentally characterise devices and transitions at mmWave.
Who it's for
- RF integrated circuit designer wishing to specialise in mmWave Front-Ends and RF Packaging.
- Packaging engineer wishing to specialise in mmWave Front-Ends and RF Packaging.
- Antenna-in-package engineer wishing to specialise in mmWave Front-Ends and RF Packaging.
- mmWave measurement engineer wishing to specialise in mmWave Front-Ends and RF Packaging.
- 5G systems engineer wishing to specialise in mmWave Front-Ends and RF Packaging.
- Radar engineer wishing to specialise in mmWave Front-Ends and RF Packaging.
- Engineering or science graduates looking to enter the semiconductor industry.
What you'll work with
- 3GPP TS 38.101-2
- 3GPP TS 38.104
- ETSI EN 302 217-2
- ETSI EN 301 091
- JEDEC JESD22-A104
- IPC-2223
- IEEE 802.11ay
8 modules · 800 h
1.1Bands from 24 to 100 GHz and their use1.2Propagation losses and atmospheric absorption1.3SiGe, CMOS and GaAs semiconductor technologies1.4GaN and InP for high frequency1.5Transmission lines at mmWave1.6Substrate-integrated waveguides (SIW)1.7Dielectric and conductor losses1.8Copper roughness at high frequency1.95G, radar and backhaul applications1.10Practical: calculation of losses in a coplanar line
2.1Low-noise amplifiers at mmWave2.2Power amplifiers and combining2.3Transmit/receive switches2.4Phase shifters and variable attenuators2.5Mixers and frequency multipliers2.6Oscillators and LO distribution2.7Integrated power detectors2.8Multichannel integrated beamformer circuits2.9Complete front-ends on a chip2.10Workshop: front-end budget at 28 GHz
3.1On-chip passive components3.2Inductors and transformers in silicon3.3High-frequency transistor modelling3.4EM simulation of on-chip layout3.5Compact matching networks3.6Stability in mmWave circuits3.7Power consumption and performance3.8Post-layout verification with extracted parasitics3.9Process variations and corners3.10Laboratory: EM simulation of an on-chip transformer
4.1QFN and BGA packaging technologies4.2Flip-chip and bumps4.3Wire bonding and its inductance4.4Wafer-level fan-out packages4.5System-in-package (SiP)4.6Organic and LTCC ceramic substrates4.7Transitions between chip, package and board4.8Package parasitics and resonances4.9Cost and manufacturability4.10Practical: flip-chip transition model
5.1AiP and AoC concepts5.2Antenna design on package substrates5.3Arrays in AiP modules5.4Isolation between antenna and circuits5.5Thermal integration of the module5.6Modules for mobile terminals5.7Modules for base stations and CPE5.8Calibration of integrated modules5.9OTA measurement of AiP modules5.10Case study: AiP module for FR2
6.1PCB materials for mmWave6.2Transitions to waveguide and connectors6.3Vias and their behaviour at mmWave6.4Shielding and cavities6.5Thermal management of front-ends6.6Interconnect reliability6.7Environmental testing of modules6.8Precision manufacturing and assembly6.9Layout design rules6.10Workshop: design of a microstrip-to-waveguide transition
7.1On-wafer probe measurements7.2TRL and LRRM calibration7.3Frequency extenders for VNAs7.4Power and noise measurement at mmWave7.5OTA measurements of integrated front-ends7.6Material characterisation at mmWave7.7Measurements of packages and transitions7.8Correlation between simulation and measurement7.9Automation of measurement benches7.10Laboratory: on-wafer probe measurement of an amplifier
8.1System specifications8.2Front-end architecture8.3Design of critical blocks8.4Package design and transitions8.5Antenna integration8.6Thermal analysis of the module8.7Measurement plan8.8Conclusions and future work8.9Report and presentation8.10Final review with the tutor
How you'll learn
100% online training on the SEIUM campus, with downloadable material, recorded classes and an assigned technical tutor. No fixed timetables: students progress at their own pace within the intake, which makes it possible to combine the programme with work.
Each module combines theory, guided reading of the original standard and applied exercises. The working software is Keysight PathWave RFIC Design (GoldenGate), Cadence Virtuoso, Ansys HFSS, Keysight Momentum, Sonnet, in free, academic or evaluation versions. Tests are studied using real procedures for on-wafer probe measurements, characterisation of chip-to-package transitions and OTA measurements of modules with integrated antennas. Assessment is continuous per module, plus the final integrating project.
Build it end to end
Your final project follows the real engineering workflow, step by step, reviewed by your tutor.
Analyse the particularities of propagation and materials at mmWave.
Design front-end blocks at millimetre waves.
Apply RF integrated circuit design techniques in silicon.
Select packaging technologies for high frequency.
Design modules with an antenna integrated into the package.
Where this takes you
Requirements
- Prior technical training or professional experience in the sector. A university degree is not required.
- Internet connection and a computer capable of running the programme's software.
- Sufficient Spanish-language level to follow the reading of technical standards.
Ready to start?
Send your application today. Our admissions team replies within 72 hours with your study plan and funding options.
Frequently asked questions
The programme consists of 800 hours in total, spread over 6 to 8 months. That is an average of 10 to 15 hours per week, compatible with a full-time job.
The programme uses Keysight PathWave RFIC Design (GoldenGate), Cadence Virtuoso, Ansys HFSS, Keysight Momentum and Sonnet. Free, academic or evaluation versions are used, and the tutor indicates the free alternative where one exists.
An own diploma from SEIUM upon passing the continuous assessment and the integrating project. It is in-house training, not an official Ministry title.
Yes. Modules passed in a course or postgraduate diploma in the same area are credited towards the advanced programme. Check the credit transfer policy when you enrol.
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