Diploma in PLL/Synthesis and Low Noise
Online postgraduate diploma of 800 hours in PLL/synthesis and low noise. 8 modules covering oscillators and phase noise, PLL theory, fractional synthesis, noise budgets, RF synthesisers, low-noise board design and measurement, with an assigned technical tutor.
Take the controls.
Run a real engineering trade-off from this field. Move the sliders, watch the model react in real time and beat the challenge.
What you will be able to do
Characterise oscillators through phase noise, jitter and stability.
Design stable PLLs with optimised loop filters.
Apply fractional synthesis and DDS with spur control.
Prepare noise budgets for synthesisers.
Design local oscillators for radio-frequency systems.
Implement low-noise techniques at board level.
Verify synthesisers with phase noise and lock-time measurements.
Who it's for
- RF engineers working on transceivers, radar or satellite links.
- Synthesiser design engineers aiming to master noise budgets and spur control.
- Communications hardware engineers responsible for clocking and local oscillators.
- Analogue design engineers moving into frequency synthesis.
- RF test engineers who characterise phase noise and lock behaviour.
- RF integrated circuit designers working on PLL and VCO blocks.
- Engineering or science graduates seeking to enter telecommunications.
What you'll work with
- IEEE 1139-2022 (definitions of physical quantities for fundamental frequency and time metrology)
- ITU-T G.8262 (timing characteristics of synchronous equipment slave clocks)
- ITU-T G.810 (definitions and terminology for synchronisation networks)
- 3GPP TS 38.104 (5G NR base station radio transmission and reception)
- ITU-T G.8273.2 (timing characteristics of telecom boundary and slave clocks)
- IEEE 1588-2019 (Precision Time Protocol)
- ADIsimPLL
- TI PLLatinum Sim
- Keysight ADS
- MATLAB
8 modules
1.1Leeson's model1.2Phase noise and SSB spectrum1.3Random and deterministic jitter in oscillators1.4Conversion between phase noise and jitter1.5Crystal oscillators, TCXO and OCXO1.6MEMS oscillators and their performance1.7LC and ring VCOs1.81/f and flicker noise1.9Short-term and long-term stability1.10Lab: phase noise measurement with an analyser
2.1Phase-frequency detector and charge pump2.2Integer dividers and prescalers2.3Passive and active loop filters2.4Closed-loop transfer function2.5Bandwidth, phase margin and stability2.6Lock time and acquisition2.7Reference spurs2.8Linear model in the s-domain2.9Transient simulation2.10Practical exercise: loop filter design with ADIsimPLL
3.1Fractional-N PLL and its resolution3.2MASH delta-sigma modulators3.3Fractional spurs and their mitigation3.4Dithering and noise cancellation3.5Trade-offs between spurs and noise3.6DDS: direct digital synthesis3.7Hybrid DDS-PLL architectures3.8Integrated wideband synthesisers3.9Fast frequency switching3.10Lab: analysis of fractional spurs
4.1Reference, VCO and PFD contributions4.2PLL figure of merit4.3Charge pump noise4.4Loop filter noise4.5Bandwidth optimisation4.6Integrated phase noise and RMS jitter4.7Effect of power supply noise4.8Divider noise4.9Comparison between simulation and measurement4.10Workshop: noise budget of a synthesiser
5.1Local oscillators in receivers and transmitters5.2Phase noise requirements in 5G NR5.3Reciprocal mixing and blockers5.4Multipliers and offset PLLs5.5Microwave and mmWave synthesisers5.6Direct modulation in the PLL5.7Integration into RF transceivers5.8VCO isolation and pulling5.9Filtering of harmonics and spurs5.10Practical exercise: local oscillator for a 3.5 GHz receiver
6.1Power supply with ultra-low-noise LDOs6.2VCO filtering and decoupling6.3Loop filter layout6.4Coupling and shielding6.5Selection of passive components6.6Microphonics and sensitivity to vibration6.7Thermal effects in oscillators6.8RF grounds and return paths6.9Reference design review6.10Case study: reducing spurs in a prototype
7.1Phase noise analysers7.2Cross-correlation methods7.3Measuring spurs and sidebands7.4Lock time in practice7.5Jitter measurement with an oscilloscope7.6Stability testing over temperature7.7Allan variance according to IEEE 11397.8Automating frequency sweeps7.9Characterisation report7.10Lab: cross-correlation in phase noise
8.1Frequency and noise specifications8.2Architecture selection8.3Loop filter design8.4Noise budget8.5Synthesiser simulation8.6Board design8.7Measurements and verification8.8Results report8.9Report and presentation8.10Final project: final review with your tutor
How you'll learn
Training is 100% online on the SEIUM campus, with downloadable materials, recorded classes and an assigned technical tutor. There are no fixed timetables: you progress at your own pace within the intake, making it compatible with work.
Each module combines theory, guided reading of the original standard and applied exercises. The working software is ADIsimPLL, TI PLLatinum Sim, Keysight ADS and MATLAB, in free, academic or evaluation versions. Tests are studied on real procedures for phase noise measurement with an analyser, loop filter design and characterisation of fractional spurs. Assessment is continuous by module plus the final project.
Standards covered: IEEE 1139-2022, ITU-T G.8262, ITU-T G.810, 3GPP TS 38.104, ITU-T G.8273.2, IEEE 1588-2019.
Build it end to end
Your final project follows the real engineering workflow, step by step, reviewed by your tutor.
Where this takes you
Requirements
- Prior technical training or professional experience in the sector. No university degree is required.
- Internet connection and a computer able to run the programme software.
- English sufficient to read technical standards.
Ready to start?
Send your application today. Our admissions team replies within 72 hours with your study plan and funding options.
Frequently asked questions
The programme totals 800 hours over 6–8 months. You set your own pace within each intake, and your tutor helps you plan the workload around your job.
You work with ADIsimPLL, TI PLLatinum Sim, Keysight ADS and MATLAB, using free, academic or evaluation versions. Your tutor indicates the free alternative wherever one exists.
A SEIUM Institute diploma, awarded on passing the continuous assessment and the final project. It is SEIUM's own qualification, not an official state degree; its recognition depends on the programme completed and the regulations of each country.
Yes. Modules passed are recognised in a higher programme in the same area (postgraduate diploma or master's). Ask about the recognition policy when you enrol.
Prior technical training or professional experience in the sector (no university degree required), a computer able to run the software and English sufficient to read technical standards.
Start dates are set by SEIUM's faculty for each intake. Our admissions team will confirm the next available date when you apply.
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