Postgraduate DiplomaElectronics, Embedded Systems & Telecom Applications open

Diploma in EMC Design: Shielding, GND and Filtering

Online postgraduate diploma of 800 hours in EMC design: shielding, grounding and filtering. 8 modules covering interference mechanisms, grounding systems, PCB design for EMC, filtering, electromagnetic shielding, cables and systems, and simulation for robust design, with an assigned technical tutor.

Duration800 hours · 6–8 months
ModeOnline
LanguageEnglish
Start datesSet by the faculty
AwardSEIUM Institute diploma

Diploma in EMC Design: Shielding, GND and Filtering — studying from Singapore

Singapore is one of Asia's leading electronics manufacturing centres, with semiconductor fabrication, back-end assembly and test, and precision electronics concentrated in areas such as Tampines and Jurong. The sector also includes embedded systems for industrial and automotive use and a strong telecommunications base led by the Infocomm Media Development Authority. Major employers include global semiconductor firms and electronics manufacturers. Engineers work on hardware design, firmware, communications systems and test engineering.

Fees for Singapore: S$2,130 (Singapore dollar), with instalments and employer sponsorship available.

Relevant bodies in Singapore

  • Infocomm Media Development Authority (IMDA)
  • Singapore Semiconductor Industry Association
  • Institute of Electrical and Electronics Engineers (IEEE) Singapore Section
  • Enterprise Singapore

Typical roles

  • Embedded Systems Engineer
  • Electronics Design Engineer
  • Telecommunications Engineer
  • Test Engineer

Questions from Singapore

How are electronics and telecom engineers recognised in Singapore, and does SEIUM count?

Telecom and electronics engineering is regulated by the Infocomm Media Development Authority (IMDA), and engineers may register with the Professional Engineers Board (PEB). SEIUM's qualifications are private, not state degrees, and not accredited by any national body. Whether they are recognised is decided by employers or the relevant body, so confirm this before enrolling.

Which Singapore employers hire embedded systems and telecom engineers?

Singapore has demand from telecom operators, semiconductor and electronics manufacturers, defence and aerospace firms, and industrial automation companies. Employers generally assess hands-on skills in firmware, hardware design and testing. Your final project can evidence embedded or telecom competence, but its value is for each employer to judge.

Can I follow this from Singapore while working, and does it need a visa?

Yes, the programmes are 100% online and taught in English, so no student visa is needed to study from home in Singapore. Expect a heavy workload: 1,900 hours for a master's, 800 for a postgraduate diploma and 300 for a specialist course. Fees can be paid in instalments, and employer sponsorship is possible.

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Learning outcomes

What you will be able to do

01

Identify the coupling mechanisms of electromagnetic interference.

02

Design effective grounding and earthing systems.

03

Apply EMC-oriented PCB design rules.

04

Design interference filters for power and signal lines.

05

Specify shielding solutions for enclosures and cables.

06

Integrate EMC criteria at system level.

07

Verify designs through simulation and measurements.

Profile

Who it's for

  • EMC engineers who want a design-first approach rather than fixing problems in the test lab.
  • Hardware engineers whose products must pass emission and immunity tests.
  • PCB designers looking to master stackup, grounding and layout for EMC.
  • Electronic product engineers taking designs through CE marking.
  • Regulatory compliance engineers working with the EMC Directive.
  • Electrical systems engineers integrating cabinets, drives and cabling.
  • Engineering or science graduates seeking to enter consumer electronics.
Standards & tools

What you'll work with

  • Directive 2014/30/EU (EU Electromagnetic Compatibility Directive)
  • CISPR 32:2015 (emission requirements for multimedia equipment)
  • IEC 61000-4-3:2020 (radiated RF electromagnetic field immunity test)
  • IEC 61000-4-6:2023 (immunity to conducted disturbances induced by RF fields)
  • CISPR 25:2021 (vehicle radio disturbance limits for on-board receivers)
  • IEC 61000-6-2:2016 (immunity standard for industrial environments)
  • IEC 61000-6-4:2018 (emission standard for industrial environments)
  • IEEE 299-2006 (measuring the effectiveness of shielding enclosures)
  • CST Studio Suite
  • LTspice
  • Ansys HFSS
  • Altium Designer
Syllabus

8 modules

  1. 1.1Source, path and victim
  2. 1.2Conducted, inductive, capacitive and radiated coupling
  3. 1.3Differential mode and common mode
  4. 1.4Spectrum of trapezoidal signals
  5. 1.5Unintentional antennas: cables and slots
  6. 1.6Near field and far field
  7. 1.7Immunity versus emission
  8. 1.8Essential requirements of the EMC Directive
  9. 1.9The cost of fixing EMC late
  10. 1.10Case study: diagnosing a real EMC problem
  1. 2.1Signal ground, chassis ground and safety earth
  2. 2.2Partial inductance and ground bounce
  3. 2.3Continuous ground planes
  4. 2.4Split grounds: when and how
  5. 2.5Single-point and multipoint grounding
  6. 2.6Ground loops and how to break them
  7. 2.7Connection between chassis and board
  8. 2.8Grounding in mixed-signal systems
  9. 2.9Common grounding design errors
  10. 2.10Practical exercise: measuring ground noise on a board
  1. 3.1EMC-oriented stackup
  2. 3.2Board edges and stitching vias
  3. 3.3Partitioning of functional zones
  4. 3.4Decoupling for EMC
  5. 3.5Routing clocks and fast signals
  6. 3.6Connectors and transitions to cable
  7. 3.7The 20H rule and its real validity
  8. 3.8Switched-mode power supplies on the board
  9. 3.9EMC layout review
  10. 3.10Lab: comparing the emissions of two layouts
  1. 4.1LC, pi and T filters
  2. 4.2Common-mode chokes
  3. 4.3Ferrites and their frequency behaviour
  4. 4.4X and Y capacitors
  5. 4.5Mains power filters
  6. 4.6Insertion loss and impedance mismatch
  7. 4.7Filtering signal lines
  8. 4.8Placement of filters at the input
  9. 4.9Resonances and damping
  10. 4.10Workshop: designing a mains filter for an SMPS
  1. 5.1Shielding effectiveness: absorption and reflection
  2. 5.2Conductive and magnetic materials
  3. 5.3Apertures, slots and ventilation
  4. 5.4Conductive seals and gaskets
  5. 5.5Cable shielding and 360° bonding
  6. 5.6Metal enclosures and metallised plastics
  7. 5.7Board-level shielding
  8. 5.8Measurement according to IEEE 299
  9. 5.9Penetrations and feedthrough filters
  10. 5.10Practical exercise: shielding effectiveness of an enclosure
  1. 6.1Common-mode current on cables
  2. 6.2Twisted pairs and coaxial cables
  3. 6.3Shield termination
  4. 6.4Filtered input connectors
  5. 6.5Wiring in industrial cabinets
  6. 6.6Separating power and signal cables
  7. 6.7System-level EMC architecture
  8. 6.8Zoning and barriers
  9. 6.9Subsystem integration
  10. 6.10Case study: control cabinet with variable-speed drives
  1. 7.1Circuit modelling with parasitics
  2. 7.23D EM simulation with CST
  3. 7.3Predicting cable emissions
  4. 7.4Cavity resonance analysis
  5. 7.5Immunity to radiated fields
  6. 7.6Conducted immunity according to IEC 61000-4-6
  7. 7.7EMC design checklists
  8. 7.8EMC risk analysis
  9. 7.9Test strategy
  10. 7.10Practical exercise: simulating a slot in a chassis
  1. 8.1Requirements and applicable standards
  2. 8.2Grounding architecture
  3. 8.3EMC-oriented layout
  4. 8.4Filter design
  5. 8.5Shielding concept
  6. 8.6Simulation and review
  7. 8.7Verification measurements
  8. 8.8EMC design report
  9. 8.9Report and presentation
  10. 8.10Final project: final review with your tutor
Methodology, software & labs

How you'll learn

Training is 100% online on the SEIUM campus, with downloadable materials, recorded classes and an assigned technical tutor. There are no fixed timetables: you progress at your own pace within the intake, making it compatible with work.

Each module combines theory, guided reading of the original standard and applied exercises. The working software is CST Studio Suite, LTspice, Ansys HFSS and Altium Designer, in free, academic or evaluation versions. Tests are studied on real procedures for conducted and radiated emission measurements, shielding effectiveness evaluation and ground loop diagnosis. Assessment is continuous by module plus the final project.

Standards covered: Directive 2014/30/EU, CISPR 32:2015, IEC 61000-4-3:2020, IEC 61000-4-6:2023, CISPR 25:2021, IEC 61000-6-2:2016, IEC 61000-6-4:2018, IEEE 299-2006.

Assigned technical tutor:every module ends with a deliverable that your tutor marks individually.
Standards-based learning:guided reading of Directive 2014/30/EU, CISPR 32:2015 and IEC 61000-4-3:2020 applied to real cases, not as a theoretical annex.
Industry software:CST Studio Suite, LTspice, Ansys HFSS and Altium Designer, in free, academic or evaluation versions.
Final project:an EMC design project covering grounding architecture, layout, filtering, shielding and verification measurements, reviewed by your tutor.
Flexible format:100% online, no fixed timetables, compatible with full-time work.
Capstone project

Build it end to end

Your final project follows the real engineering workflow, step by step, reviewed by your tutor.

Requirements and grounding
Identify the applicable standards and define the grounding architecture.
EMC-oriented layout
Lay out the board following EMC design rules.
Filtering and shielding
Design the filters and the shielding concept for the product.
Simulation and verification
Simulate, review and verify the design with measurements.
Final project
Present the EMC design report, reviewed by your tutor.
Career opportunities

Where this takes you

Electromagnetic Compatibility EngineerHardware EngineerPCB DesignerElectronic Product EngineerRegulatory Compliance EngineerElectrical Systems Engineer
Admissions & scholarships

Requirements

  • Prior technical training or professional experience in the sector. No university degree is required.
  • Internet connection and a computer able to run the programme software.
  • English sufficient to read technical standards.

Ready to start?

Send your application today. Our admissions team replies within 72 hours with your study plan and funding options.

FAQ

Frequently asked questions

The programme totals 800 hours over 6–8 months. You set your own pace within each intake, and your tutor helps you plan the workload around your job.

You work with CST Studio Suite, LTspice, Ansys HFSS and Altium Designer, using free, academic or evaluation versions. Your tutor indicates the free alternative wherever one exists.

A SEIUM Institute diploma, awarded on passing the continuous assessment and the final project. It is SEIUM's own qualification, not an official state degree; its recognition depends on the programme completed and the regulations of each country.

Yes. Modules passed are recognised in a higher programme in the same area (postgraduate diploma or master's). Ask about the recognition policy when you enrol.

Prior technical training or professional experience in the sector (no university degree required), a computer able to run the software and English sufficient to read technical standards.

Start dates are set by SEIUM's faculty for each intake. Our admissions team will confirm the next available date when you apply.

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