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Master'sElectronics, Embedded Systems & Telecom Applications open

Master’s in RF Front-End Engineering

Online master's programme of 1,900 hours in RF front-end engineering: 12 modules covering RF parameters and measurement, RF semiconductor technologies, LNAs, power amplifiers, mixers, oscillators and synthesisers, filters and duplexers, switching, integrated front-end modules and linearisation, with an assigned technical tutor.

Duration1900 h
ModeOnline
LanguageEnglish
Start datesSet by the faculty
AwardSEIUM Institute diploma
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Learning outcomes

What you will be able to do

01

Measure and characterise RF networks using S-parameters and noise figure.

02

Select the right semiconductor technology for each block.

03

Design low-noise and power amplifiers.

04

Design mixers, oscillators and frequency synthesisers.

05

Integrate filters, switches and control into front-end modules.

06

Apply linearisation and calibration techniques.

07

Develop and measure a complete RF front-end.

Profile

Who it's for

  • RF design engineers.
  • RF integrated circuit designers.
  • Mobile front-end engineers.
  • Power amplifier engineers.
  • RF test engineers.
  • RF applications engineers.
  • Engineering or science graduates aiming to enter the mobile telephony sector.
Standards & tools

What you'll work with

  • 3GPP TS 38.101-1 (5G NR user equipment radio transmission and reception (FR1))
  • 3GPP TS 36.101 (LTE user equipment radio transmission and reception)
  • IEEE 802.11ax (Wi-Fi 6 high-efficiency WLAN)
  • ETSI EN 301 893 (5 GHz RLAN equipment)
  • Directive 2014/53/EU (Radio Equipment Directive)
  • ETSI EN 300 328 (wideband transmission systems in the 2.4 GHz band)
  • MIPI RFFE (RF front-end control interface)
  • JEDEC JESD22-A114 (ESD sensitivity testing, human body model)
  • Keysight PathWave ADS
  • Cadence Virtuoso RF
  • Sonnet
  • AWR Microwave Office
  • MATLAB RF Toolbox
Syllabus

12 modules · 1900 h

  1. 1.1S, Y and Z parameters
  2. 1.2Transducer and available gain
  3. 1.3Stability and the Rollett factor
  4. 1.4Thermal noise and noise temperature
  5. 1.5Compression and intercept points
  6. 1.6SOLT and TRL calibration
  7. 1.7De-embedding of fixtures
  8. 1.8Noise figure measurement
  9. 1.9Phase noise measurement
  10. 1.10Lab: calibration and measurement with a VNA
  1. 2.1CMOS and RF-SOI
  2. 2.2SiGe BiCMOS technology
  3. 2.3GaAs pHEMT transistors
  4. 2.4GaN HEMT in RF
  5. 2.5Non-linear transistor models
  6. 2.6Integrated passive components
  7. 2.7Packages and SiP modules
  8. 2.8Technology choice by band
  9. 2.9Reliability in RF devices
  10. 2.10Case study: technology selection for a PA
  1. 3.1Noise and gain circles
  2. 3.2Simultaneous noise-power matching
  3. 3.3Inductive source degeneration
  4. 3.4Broadband LNAs
  5. 3.5ESD protection
  6. 3.6LNA linearity
  7. 3.7Biasing and power consumption
  8. 3.8Unconditional stability analysis
  9. 3.9LNA layout
  10. 3.10Practical exercise: design of a 3.5 GHz LNA
  1. 4.1Classes A, AB, B and C
  2. 4.2Switched classes E and F
  3. 4.3Doherty amplifier architecture
  4. 4.4Envelope tracking
  5. 4.5Load-pull and output matching
  6. 4.6PAE efficiency and thermal management
  7. 4.7Power combining
  8. 4.8ACLR and EVM linearity
  9. 4.9Broadband PAs
  10. 4.10Lab: load-pull measurement of a GaN transistor
  1. 5.1Diode mixers
  2. 5.2Gilbert cell mixers
  3. 5.3Passive CMOS mixers
  4. 5.4Image rejection
  5. 5.5LO-RF port isolation
  6. 5.6Intermodulation products
  7. 5.7IQ modulators and demodulators
  8. 5.8Subharmonic conversion mixing
  9. 5.9Noise in mixers
  10. 5.10Workshop: simulation of an IQ mixer
  1. 6.1LC and crystal oscillators
  2. 6.2VCO and tuning range
  3. 6.3Phase noise and Leeson's model
  4. 6.4Integer and fractional PLLs
  5. 6.5Sigma-delta fractional synthesisers
  6. 6.6Direct digital synthesis
  7. 6.7On-chip LO distribution
  8. 6.8TCXO and OCXO reference oscillators
  9. 6.9Injection locking and pulling
  10. 6.10Practical exercise: phase noise analysis of a PLL
  1. 7.1Lumped-element filters
  2. 7.2Coupled-resonator filters
  3. 7.3SAW, BAW and FBAR filters
  4. 7.4Duplexers for FDD bands
  5. 7.5Multiplexers for carrier aggregation
  6. 7.6Ceramic and cavity filters
  7. 7.7Tuning and sensitivity
  8. 7.8Insertion loss and rejection
  9. 7.9Inter-band coexistence
  10. 7.10Case study: duplexer for band n78
  1. 8.1SOI and PIN switches
  2. 8.2Antenna tuners
  3. 8.3Digital step attenuators
  4. 8.4Phase shifters for beamforming
  5. 8.5MIPI RFFE control
  6. 8.6Power detectors
  7. 8.7Integrated directional couplers
  8. 8.8VSWR management
  9. 8.9Front-end protection
  10. 8.10Lab: antenna switch with RFFE control
  1. 9.1Mobile front-end architecture
  2. 9.2FEM and PAMiD modules
  3. 9.3Front-end for Wi-Fi 6E and 7
  4. 9.4Front-end for 5G FR1
  5. 9.5Millimetre-wave front-end
  6. 9.6Antenna-in-package integration
  7. 9.7Wi-Fi, Bluetooth and cellular coexistence
  8. 9.8Envelope and power reduction
  9. 9.9Board design for the front-end
  10. 9.10Workshop: budget of a 5G FEM
  1. 10.1Digital predistortion of amplifiers
  2. 10.2Behavioural PA models
  3. 10.3Cartesian feedback linearisation
  4. 10.4IQ and DC calibration
  5. 10.5Thermal gain compensation
  6. 10.6Factory calibration
  7. 10.7Built-in self-test on chip
  8. 10.8EVM and ACLR measurement
  9. 10.9Output power calibration
  10. 10.10Practical exercise: digital predistortion in MATLAB
  1. 11.1RF layout and grounding
  2. 11.2EM simulation of passives
  3. 11.3Package coupling
  4. 11.4Shielding and compartmentalisation
  5. 11.5Sensitivity and Monte Carlo analysis
  6. 11.6Pre-silicon design verification
  7. 11.7Production testing
  8. 11.8Radio compliance of the front-end
  9. 11.9Manufacturing yield management
  10. 11.10Case study: diagnosis of a coexistence failure
  1. 12.1Front-end specification
  2. 12.2Technology and architecture selection
  3. 12.3RF block design
  4. 12.4Circuit and EM model co-simulation
  5. 12.5Board and shielding design
  6. 12.6Prototyping and measurements
  7. 12.7Comparison with specifications
  8. 12.8Conclusions on the front-end
  9. 12.9Master's Thesis report
  10. 12.10Master's Thesis: defence before a panel
Methodology, software & labs

How you'll learn

100% online training on the SEIUM campus, with downloadable material, recorded classes and an assigned technical tutor. No fixed timetables: you progress at your own pace within the intake, making it compatible with work.

Each module combines theory, guided reading of the original standard and applied exercises. The working software is Keysight PathWave ADS, Cadence Virtuoso RF, Sonnet, AWR Microwave Office and MATLAB RF Toolbox, in free, academic or evaluation versions. Testing is studied through real procedures: load-pull measurement of power transistors, characterisation of noise figure and linearity, and validation of front-end modules in 5G bands. Assessment is continuous by module, plus the final Master's Thesis.

Standards covered: 3GPP TS 38.101-1, 3GPP TS 36.101, IEEE 802.11ax, ETSI EN 301 893, Directive 2014/53/EU, ETSI EN 300 328, MIPI RFFE, JEDEC JESD22-A114.

Assigned technical tutor:every module ends with a deliverable that your tutor marks individually.
Standards-based learning:guided reading of 3GPP TS 38.101-1, 3GPP TS 36.101 and IEEE 802.11ax applied to real cases, not as a theoretical annex.
Industry software:Keysight PathWave ADS, Cadence Virtuoso RF, Sonnet, AWR Microwave Office and MATLAB RF Toolbox, in free, academic or evaluation versions.
Master's Thesis with defence:Design, co-simulation, prototyping and measurement of a complete RF front-end, defended before a panel.
Flexible format:100% online, no fixed timetables, compatible with full-time work.
Capstone project

Build it end to end

Your final project follows the real engineering workflow, step by step, reviewed by your tutor.

Front-end specification
Specify the front-end and select its technology and architecture.
RF block design
Design the LNA, PA, mixer and other RF blocks.
Circuit-EM co-simulation
Co-simulate the circuit with the EM model in ADS or Sonnet.
Board and shielding
Design the board layout and shielding for the front-end.
Master's Thesis
Prototype, measure and compare the front-end against its specifications, defended before a panel.
Career opportunities

Where this takes you

RF design engineerRF integrated circuit designerMobile front-end engineerPower amplifier engineerRF test engineerRF applications engineer
Admissions & scholarships

Requirements

  • A university degree in engineering, science or architecture, or equivalent demonstrable professional experience.
  • An internet connection and a computer capable of running the programme's software.
  • English sufficient to read technical standards.

Ready to start?

Send your application today. Our admissions team replies within 72 hours with your study plan and funding options.

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FAQ

Frequently asked questions

The programme totals 1,900 hours over 12–14 months. You set your own pace within each intake, and your tutor helps you plan the workload around your job.

You work with Keysight PathWave ADS, Cadence Virtuoso RF, Sonnet, AWR Microwave Office and MATLAB RF Toolbox, using free, academic or evaluation versions. Your tutor indicates the free alternative wherever one exists.

A SEIUM Institute diploma, awarded on passing the continuous assessment and the Master's Thesis. It is SEIUM's own qualification, not an official state degree; its recognition depends on the programme completed and the regulations of each country.

Yes. Modules passed in a course or postgraduate diploma in the same area are recognised in the higher programme. Ask about the recognition policy when you enrol.

A university degree in engineering, science or architecture (or equivalent professional experience), a computer able to run the programme's software and English sufficient to read technical standards.

Start dates are set by SEIUM's faculty for each intake. Our admissions team will confirm the next available date when you apply.

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