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Master'sElectronics, Embedded Systems & Telecom Applications open

Master’s in Firmware Security Engineering

Online master's programme of 1,900 hours in firmware security engineering. 12 modules covering embedded architecture, secure boot, applied cryptography, secure OTA updates, secure development, security testing, physical attack countermeasures, vulnerability management and compliance with the Cyber Resilience Act, IEC 62443-4 and ETSI EN 303 645, with an assigned technical tutor.

Duration1900 h
ModeOnline
LanguageEnglish
Start datesSet by the faculty
AwardSEIUM Institute diploma
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Learning outcomes

What you will be able to do

01

Analyse the threats to an embedded device from the design stage.

02

Design secure boot chains with a hardware root of trust.

03

Apply cryptography suited to resource-constrained devices.

04

Implement signed, robust OTA updates.

05

Apply secure development practices and static analysis.

06

Verify product security and manage its vulnerabilities.

07

Prepare compliance documentation for the Cyber Resilience Act.

Profile

Who it's for

  • Firmware security engineers who want to broaden their expertise across the full product lifecycle.
  • Embedded systems engineers taking on security responsibilities.
  • Product security managers preparing for the Cyber Resilience Act.
  • Industrial cybersecurity auditors working with IEC 62443.
  • Automotive cybersecurity engineers applying ISO/SAE 21434 and UNECE R155/R156.
  • Product certification specialists.
  • Engineering or science graduates seeking to move into the automotive sector.
Standards & tools

What you'll work with

  • Regulation (EU) 2024/2847 (Cyber Resilience Act for products with digital elements)
  • IEC 62443-4-1 and 62443-4-2 (secure product development and component security requirements)
  • ETSI EN 303 645 (cybersecurity for consumer IoT)
  • ISO/SAE 21434 (road vehicle cybersecurity engineering)
  • NIST SP 800-193 (platform firmware resiliency)
  • UNECE R155 and R156 (vehicle cybersecurity and software updates)
  • Common Criteria, ISO/IEC 15408 (IT security evaluation)
  • Ghidra
  • Yocto Project
  • MCUboot
  • Cppcheck
  • Wireshark
Syllabus

12 modules · 1900 h

  1. 1.1Microcontrollers and SoCs
  2. 1.2Flash, ROM and RAM memories
  3. 1.3Boot process and loader chain
  4. 1.4Peripherals and debug interfaces
  5. 1.5Real-time operating systems
  6. 1.6Embedded Linux
  7. 1.7IoT device firmware
  8. 1.8Firmware in automotive and industry
  9. 1.9Firmware lifecycle
  10. 1.10Workshop: architecture map of a device
  1. 2.1Threat model of a device
  2. 2.2Physical and logical attack surface
  3. 2.3Hardware root of trust
  4. 2.4Code confidentiality and integrity
  5. 2.5On-device key management
  6. 2.6Principle of least privilege
  7. 2.7Security by design
  8. 2.8Product security requirements
  9. 2.9Regulations applicable to connected products
  10. 2.10Practical: threat analysis of an IoT sensor
  1. 3.1Secure boot and signature verification
  2. 3.2Chain of trust at boot
  3. 3.3Secure elements and TPM
  4. 3.4Secure key storage
  5. 3.5Measured boot and attestation
  6. 3.6UEFI Secure Boot
  7. 3.7Revocation of compromised keys
  8. 3.8Version anti-rollback
  9. 3.9Boot verification testing
  10. 3.10Lab: verified boot on a development board
  1. 4.1Symmetric and asymmetric algorithms
  2. 4.2Hash functions and signatures
  3. 4.3Random number generators
  4. 4.4Cryptography with limited resources
  5. 4.5Hardware cryptographic accelerators
  6. 4.6Key lifecycle management
  7. 4.7Public key infrastructure for devices
  8. 4.8Common implementation errors
  9. 4.9Validation of cryptographic modules
  10. 4.10Practical: signing and verifying an image
  1. 5.1OTA update architectures
  2. 5.2Package signing and encryption
  3. 5.3A/B partitions and recovery
  4. 5.4Pre-installation verification
  5. 5.5Secure distribution of updates
  6. 5.6Device fleet management
  7. 5.7UNECE R156 requirements
  8. 5.8Version traceability
  9. 5.9Update robustness testing
  10. 5.10Lab: OTA channel with signature verification
  1. 6.1MISRA C and CERT C coding standards
  2. 6.2Secure memory management
  3. 6.3Static code analysis
  4. 6.4Peer code review
  5. 6.5Dependency management and SBOM
  6. 6.6Reproducible builds
  7. 6.7Compiler protections
  8. 6.8Continuous integration with security controls
  9. 6.9Development security documentation
  10. 6.10Practical: static analysis of an embedded project
  1. 7.1Product security test plan
  2. 7.2Robustness testing and defensive fuzzing
  3. 7.3Verification of security requirements
  4. 7.4Assessment of debug interfaces
  5. 7.5Binary analysis for verification purposes
  6. 7.6Device communications testing
  7. 7.7Emulation environments
  8. 7.8Management of findings and fixes
  9. 7.9Evidence for certification
  10. 7.10Lab: laboratory verification campaign
  1. 8.1Types of physical attacks on hardware
  2. 8.2Protection of JTAG and SWD ports
  3. 8.3Side-channel countermeasures
  4. 8.4Fault-injection countermeasures
  5. 8.5Memory protection and code readout protection
  6. 8.6Tamper detection
  7. 8.7Board design with security criteria
  8. 8.8Evaluation of countermeasures
  9. 8.9Balancing cost and protection
  10. 8.10Case study: review of a product's countermeasures
  1. 9.1PSIRT and product incident management
  2. 9.2Coordinated vulnerability disclosure
  3. 9.3CVEs and customer communication
  4. 9.4Prioritisation and remediation
  5. 9.5Support throughout the product lifetime
  6. 9.6Monitoring third-party components
  7. 9.7Notification obligations
  8. 9.8Response metrics
  9. 9.9Lessons learned
  10. 9.10Practical: a company's PSIRT procedure
  1. 10.1Cyber Resilience Act (EU) 2024/2847
  2. 10.2ETSI EN 303 645 for consumer IoT
  3. 10.3IEC 62443-4-1 and 4-2 in industry
  4. 10.4ISO/SAE 21434 in automotive
  5. 10.5Common Criteria and protection profiles
  6. 10.6European certification schemes
  7. 10.7Conformity assessment
  8. 10.8Required technical documentation
  9. 10.9Working with evaluation laboratories
  10. 10.10Case study: regulatory compliance matrix
  1. 11.1Firmware in connected vehicles
  2. 11.2Connected medical devices
  3. 11.3Industrial control systems
  4. 11.4Energy infrastructure
  5. 11.5Avionics and space systems
  6. 11.6Consumer electronics
  7. 11.7Sector-specific requirements
  8. 11.8Documented real-world cases
  9. 11.9Technology trends
  10. 11.10Workshop: comparison of sector requirements
  1. 12.1Device selection and scope
  2. 12.2Product threat model
  3. 12.3Proposed security architecture
  4. 12.4Secure boot and update
  5. 12.5Security verification plan
  6. 12.6Regulatory compliance analysis
  7. 12.7Vulnerability management plan
  8. 12.8Assessment of costs and residual risks
  9. 12.9Master's Thesis report
  10. 12.10Master's Thesis: defence before a panel
Methodology, software & labs

How you'll learn

Training is 100% online on the SEIUM campus, with downloadable material, recorded classes and an assigned technical tutor. There are no fixed timetables: you progress at your own pace within the intake, so it fits around your job.

Each module combines theory, guided reading of the original standard and applied exercises. The working software is Ghidra, Yocto Project, MCUboot, Cppcheck and Wireshark, in free, academic or evaluation versions. Work is based on real procedures: development boards, firmware emulation environments and product verification campaigns. Assessment is continuous per module, plus the final Master's Thesis.

Standards covered: Regulation (EU) 2024/2847 (Cyber Resilience Act), IEC 62443-4-1 and 62443-4-2, ETSI EN 303 645, ISO/SAE 21434, NIST SP 800-193, UNECE R155 and R156, Common Criteria (ISO/IEC 15408).

Assigned technical tutor:every module ends with a deliverable that your tutor marks individually.
Standards-based learning:guided reading of the Cyber Resilience Act, IEC 62443-4-1/4-2 and ETSI EN 303 645 applied to real cases, not as a theoretical annex.
Industry software:Ghidra, Yocto Project, MCUboot, Cppcheck and Wireshark, in free, academic or evaluation versions.
Master's Thesis with defence:A complete security architecture for a device, covering threat model, secure boot and updates, verification and regulatory compliance, defended before a panel.
Flexible format:100% online, no fixed timetables, compatible with full-time work.
Capstone project

Build it end to end

Your final project follows the real engineering workflow, step by step, reviewed by your tutor.

IoT threat analysis
Build the threat model of an IoT sensor.
Verified boot
Implement verified boot on a development board.
Signed OTA channel
Set up an OTA update channel with signature verification.
Compliance matrix
Prepare a regulatory compliance matrix and PSIRT procedure.
Master's Thesis
A full device security architecture and compliance analysis, defended before a panel.
Career opportunities

Where this takes you

Firmware security engineerEmbedded systems engineerProduct security managerIndustrial cybersecurity auditorAutomotive cybersecurity engineerProduct certification specialist
Admissions & scholarships

Requirements

  • University degree in engineering, science or architecture, or equivalent demonstrable professional experience.
  • Internet connection and a computer capable of running the programme software.
  • English sufficient to read technical standards.

Ready to start?

Send your application today. Our admissions team replies within 72 hours with your study plan and funding options.

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FAQ

Frequently asked questions

The programme totals 1,900 hours over 12–14 months. You set your own pace within each intake, and your tutor helps you plan the workload around your job.

You work with Ghidra, Yocto Project, MCUboot, Cppcheck and Wireshark, using free, academic or evaluation versions. Your tutor indicates the free alternative wherever one exists.

A SEIUM Institute diploma, awarded on passing the continuous assessment and the Master's Thesis. It is SEIUM's own qualification, not an official state degree; its recognition depends on the programme completed and the regulations of each country.

Yes. Modules passed in a course or postgraduate diploma in the same area are recognised in the higher programme. Ask about the recognition policy when you enrol.

A university degree in engineering, science or architecture (or equivalent professional experience), a computer able to run the programme software, and English sufficient to read technical standards.

Start dates are set by SEIUM's faculty for each intake. Our admissions team will confirm the next available date when you apply.

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