Master'sData, AI, Simulation & Analytics Applications open

Master’s in Edge AI & TinyML

Online master's programme of 1,900 hours in Edge AI and TinyML: quantisation and pruning, runtimes on MCUs and NPUs, and secure OTA updates. 12 modules covering hardware, on-device data, efficient models, compression, deployment frameworks, accelerators, fleet operation and security, with an assigned technical tutor.

Duration12–14 months
ModeOnline
LanguageEnglish
Start datesSet by the faculty
AwardSEIUM Institute diploma

Master’s in Edge AI & TinyML — studying from Australia

Data, artificial intelligence and simulation are central to Australian industries including mining, banking, health, agriculture and government. Organisations use machine learning, digital twins and advanced analytics to improve productivity, asset performance and decision making. National science agency CSIRO, along with universities and a growing start-up ecosystem, drives research and applied innovation. Australia has also developed national AI ethics principles, making responsible design an important professional consideration. Engineers in this area typically work for technology firms, consultancies, research organisations and large enterprises.

Fees for Australia: A$12,600 (AUD), with instalments and employer sponsorship available.

Relevant bodies in Australia

  • Australian Computer Society (ACS)
  • CSIRO
  • Department of Industry, Science and Resources
  • Standards Australia

Typical roles

  • Data Scientist
  • Machine Learning Engineer
  • Simulation Engineer
  • Analytics Engineer

Questions from Australia

Which Australian bodies recognise data and AI engineering skills?

Engineers Australia and the Australian Computer Society (ACS) are the main professional bodies, and the ACS runs a skills assessment for migration purposes. SEIUM's private qualifications are not accredited by either. Whether a private qualification is valued is decided by the employer or the relevant body.

What data and AI careers exist in Australia for this training?

Australia has demand for data scientists, AI engineers and simulation analysts across finance, health, mining, government and technology firms. Employers mainly assess your portfolio, technical skills and results. A SEIUM qualification may support your profile, but each employer decides its relevance.

Can I study this online from Australia while working?

Yes, the programmes are fully online and taught in English, and no student visa is needed to study from home. Specialist courses are 300 hours, postgraduate diplomas 800 and master's 1,900, with an assigned technical tutor and a final project. Fees can be paid in instalments, and employer sponsorship may be possible.

Virtual lab · try it before you enrol

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Run a real engineering trade-off from this field. Move the sliders, watch the model react in real time and beat the challenge.

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Learning outcomes

What you will be able to do

01

Select suitable hardware for inference at the edge.

02

Capture and preprocess sensor data on constrained devices.

03

Design efficient models for microcontrollers.

04

Compress models through quantisation, pruning and distillation.

05

Deploy models with embedded frameworks and accelerators.

06

Manage device fleets and OTA updates.

07

Industrialise products with embedded AI securely.

Profile

Who it's for

  • Edge AI engineers looking to deepen their expertise.
  • TinyML developers moving from prototypes to production devices.
  • Embedded systems engineers adding machine learning to their products.
  • Embedded vision engineers.
  • IoT architects.
  • Connected product engineers.
  • Engineering or science graduates aiming to enter consumer electronics.
Standards & tools

What you'll work with

  • Directive 2014/53/EU (radio equipment)
  • Regulation (EU) 2024/2847 (Cyber Resilience Act)
  • ETSI EN 303 645 (cyber security for consumer IoT)
  • IEC 61508 (functional safety)
  • PSA Certified (IoT security certification framework)
  • Regulation (EU) 2024/1689 (AI Act)
  • ISO/IEC 22989 (AI concepts and terminology)
  • TensorFlow Lite for Microcontrollers
  • Edge Impulse
  • STM32Cube.AI
  • Apache TVM
  • NVIDIA TensorRT
Syllabus

12 modules

  1. 1.1Edge, fog and cloud
  2. 1.2Latency, privacy and energy advantages
  3. 1.3Device classes: MCU, MPU and accelerators
  4. 1.4Memory and compute constraints
  5. 1.5TinyML use cases
  6. 1.6Typical toolchain
  7. 1.7Energy consumption of inference
  8. 1.8Ecosystem and communities
  9. 1.9Limitations of ML on microcontrollers
  10. 1.10Case study: platform selection for a smart sensor
  1. 2.1ARM Cortex-M architectures
  2. 2.2DSP and Helium extensions
  3. 2.3RISC-V microcontrollers
  4. 2.4Embedded NPUs: Ethos-U
  5. 2.5Arduino Nano 33 BLE and ESP32-S3 boards
  6. 2.6Flash and SRAM memories
  7. 2.7Digital sensors and interfaces
  8. 2.8Power consumption measurement
  9. 2.9Selection by cost and availability
  10. 2.10Lab: power consumption characterisation of a board
  1. 3.1Audio, IMU and vision acquisition
  2. 3.2Fixed-point preprocessing
  3. 3.3MFCC and spectrogram extraction
  4. 3.4Windowing and filtering
  5. 3.5Field dataset collection
  6. 3.6Efficient labelling
  7. 3.7Data augmentation
  8. 3.8Imbalance and unknown classes
  9. 3.9Edge Impulse as an integrated workflow
  10. 3.10Practical exercise: vibration dataset with an accelerometer
  1. 4.1Lightweight convolutional networks
  2. 4.2MobileNet and depthwise separable convolutions
  3. 4.3MCUNet architectures
  4. 4.4Compact recurrent networks
  5. 4.5Trees and classical models on MCUs
  6. 4.6Neural architecture search
  7. 4.7MAC and memory budget
  8. 4.8Accuracy–latency trade-offs
  9. 4.9MLPerf Tiny benchmarks
  10. 4.10Lab: keyword spotting with a 20 kB CNN
  1. 5.1Post-training quantisation
  2. 5.2Quantisation-aware training
  3. 5.38-bit and 4-bit quantisation
  4. 5.4Structured and unstructured pruning
  5. 5.5Knowledge distillation
  6. 5.6Weight factorisation
  7. 5.7Graph optimisation
  8. 5.8Mixed precision
  9. 5.9Accuracy verification after compression
  10. 5.10Practical exercise: int8 quantisation of a vision model
  1. 6.1TensorFlow Lite for Microcontrollers
  2. 6.2LiteRT and model conversion
  3. 6.3CMSIS-NN
  4. 6.4STM32Cube.AI
  5. 6.5ONNX and TVM compilers
  6. 6.6Apache TVM microTVM
  7. 6.7Memory and tensor arena management
  8. 6.8RTOS integration
  9. 6.9On-device debugging
  10. 6.10Lab: deployment on STM32 with Cube.AI
  1. 7.1NVIDIA Jetson and TensorRT
  2. 7.2Google Coral Edge TPU
  3. 7.3Hailo and other NPUs
  4. 7.4Embedded Linux and Yocto
  5. 7.5Containers at the edge
  6. 7.6Real-time computer vision
  7. 7.7Multi-model inference
  8. 7.8Thermal management
  9. 7.9Performance-per-watt comparison
  10. 7.10Practical exercise: object detector on Jetson Orin
  1. 8.1Keyword spotting
  2. 8.2Predictive maintenance on sensors
  3. 8.3Human activity recognition
  4. 8.4Low-power vision
  5. 8.5Precision agriculture
  6. 8.6Environmental monitoring
  7. 8.7Health wearables
  8. 8.8Smart cities
  9. 8.9Documented industrial cases
  10. 8.10Case study: anomaly sensor for a motor
  1. 9.1BLE, LoRaWAN and NB-IoT
  2. 9.2Sending inferences versus raw data
  3. 9.3OTA model updates
  4. 9.4Device fleet management
  5. 9.5Drift monitoring at the edge
  6. 9.6On-device learning
  7. 9.7Federated learning on devices
  8. 9.8Battery and energy harvesting
  9. 9.9Product life cycle
  10. 9.10Workshop: OTA update of a model in the field
  1. 10.1Secure boot and signed firmware
  2. 10.2Model protection
  3. 10.3Physical and side-channel attacks
  4. 10.4PSA Certified and Arm TrustZone
  5. 10.5Radio Equipment Directive
  6. 10.6Product cyber resilience
  7. 10.7Reliability in extreme conditions
  8. 10.8Functional safety and ML
  9. 10.9Data privacy at the edge
  10. 10.10Case study: threat model for a TinyML node
  1. 11.1Hardware design with embedded AI
  2. 11.2CE and FCC certification
  3. 11.3Bill of materials cost
  4. 11.4Production testing
  5. 11.5Technical documentation
  6. 11.6Manufacturing scale-up
  7. 11.7Edge AI business models
  8. 11.8Product project management
  9. 11.9Sustainability and e-waste
  10. 11.10Practical exercise: industrialisation plan for a device
  1. 12.1Definition of the device and use case
  2. 12.2Hardware selection
  3. 12.3Data capture
  4. 12.4Model design and training
  5. 12.5Optimisation and compression
  6. 12.6Embedded deployment
  7. 12.7Power consumption and latency measurements
  8. 12.8Field validation
  9. 12.9Thesis report
  10. 12.10Master's Thesis: defence before a panel
Methodology, software & labs

How you'll learn

100% online training on the SEIUM campus, with downloadable material, recorded classes and an assigned technical tutor. There are no fixed timetables: you progress at your own pace within each intake, so you can combine the programme with your job.

Each module combines theory, guided reading of the original standard and applied exercises. The working software is TensorFlow Lite for Microcontrollers, Edge Impulse, STM32Cube.AI, Apache TVM and NVIDIA TensorRT, in free, academic or evaluation versions. Testing is studied on real procedures for on-board power and latency measurements, field validation of models and MLPerf Tiny benchmarks. Assessment is continuous by module, plus the final Master's Thesis.

Standards covered: Directive 2014/53/EU, Regulation (EU) 2024/2847, ETSI EN 303 645, IEC 61508, PSA Certified, Regulation (EU) 2024/1689, ISO/IEC 22989.

Assigned technical tutor:every module ends with a deliverable that your tutor marks individually.
Standards-based learning:guided reading of Directive 2014/53/EU, the Cyber Resilience Act (EU) 2024/2847 and ETSI EN 303 645 applied to real cases, not as a theoretical annex.
Industry software:TensorFlow Lite for Microcontrollers, Edge Impulse, STM32Cube.AI, Apache TVM and NVIDIA TensorRT, in free, academic or evaluation versions.
Master's Thesis with defence:a complete Edge AI device, from data capture and model design to embedded deployment and field validation, defended before a panel.
Flexible format:100% online, no fixed timetables, compatible with full-time work.
Capstone project

Build it end to end

Your final project follows the real engineering workflow, step by step, reviewed by your tutor.

Platform selection
Choose and characterise the hardware platform for a smart sensor.
Sensor dataset
Collect and preprocess a field dataset, such as accelerometer vibrations.
Compressed model
Design and quantise an efficient model that fits within the MCU budget.
Embedded deployment
Deploy the model on STM32 or Jetson and measure power and latency.
Master's Thesis
Develop a complete Edge AI device validated in the field, defended before a panel.
Career opportunities

Where this takes you

Edge AI engineerTinyML developerEmbedded systems engineerEmbedded vision engineerIoT architectConnected product engineer
Admissions & scholarships

Requirements

  • University degree in engineering, science or architecture, or equivalent demonstrable professional experience.
  • Internet connection and a computer able to run the programme software.
  • English sufficient to read technical standards.

Ready to start?

Send your application today. Our admissions team replies within 72 hours with your study plan and funding options.

FAQ

Frequently asked questions

The programme totals 1,900 hours over 12–14 months. You set your own pace within each intake, and your tutor helps you plan the workload around your job.

You work with TensorFlow Lite for Microcontrollers, Edge Impulse, STM32Cube.AI, Apache TVM and NVIDIA TensorRT, using free, academic or evaluation versions. Your tutor indicates the free alternative wherever one exists.

A SEIUM Institute diploma, awarded on passing the continuous assessment and the Master's Thesis. It is SEIUM's own qualification, not an official state degree; its recognition depends on the programme completed and the regulations of each country.

Yes. Modules passed in a course or postgraduate diploma in the same area are recognised in the higher programme. Ask about the recognition policy when you enrol.

A university degree in engineering, science or architecture (or equivalent demonstrable professional experience), a computer able to run the software and English sufficient to read technical standards.

Start dates are set by SEIUM's faculty for each intake. Our admissions team will confirm the next available date when you apply.

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